Program » Industry Session » Bonded SOI

BONDED SOI AND CAVITY SOI WAFERS ENABLING ENHANCED MEMS DESIGNS
Petri Santala
Okmetic, USA

Abstract
MEMS manufacturers are having pressures for miniaturization, better performance and higher level of integration and more streamlined manufacturing with lower costs. This has driven new requirements also to the supply chain. Silicon wafers’ importance on device performance, Total Cost of Ownership and time to market is being recognized and silicon wafer suppliers are co-operating actively with device manufacturers for device and process optimized substrates. Customized wafers and advanced and turnkey wafer solutions are the key for high-performance devices and more streamlined process flow with lower costs and shorter cycle times.

More advanced value-added silicon substrates can effectively remove the burden of the front-end operations and lower the unit costs significantly. Bonded Silicon-On-Insulator BSOI wafers and use of hermetically sealed structures enabled by Cavity SOI (C-SOI®) wafers drive for MEMS device miniaturization, cost-efficiency and more streamlined production in addition to better performance and additional design freedom.

Terrace-free option in Okmetic bonded SOI can help to maximize the device output per wafers + make the handling more straight forward, especially with products that use multiple wafer stacks.

The example below showcases how Total Cost of Ownership can be reduced by choice of MEMS platform. Cost savings can be achieved with better integration and elimination of front-end process steps at the device manufacturer site.

Biography
Mr. Petri Santala is Senior Technical Support Manager at Okmetic. He is responsible for technical customer support operations in North America, which has gained him vast expertise on MEMS manufacturers' needs and optimized wafer solutions. Mr. Santala has over 20 years of experience in silicon-based material engineering. He has worked for Okmetic since 1999 and held various positions related to research and development, process engineering and quality and applications support. In recent years, he has also been actively involved in SEMI Manufacturing Working Group's substrate standardization work and has spoken at various semiconductor events. He was also inducted in the SEMI-MEMS & Sensors Industry Group's hall of fame in 2022. Mr. Santala received his bachelor's degree in process engineering at the Espoo University of Applied Sciences, Finland.